VLSI Design

Offered By: The Academic Council Of uLektz

Certified By:
The Academic Council of uLektz

60 hours of Learning Content

Maximum 3 months.

Learning Path

Non-Linear : Random Order

Course Description
Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. In other words, an IC has many transistors on one chip, while VLSI has very many transistors on one chip. A modern VLSI chip is a complex beast with billions of transistors, millions of logic gates deployed for computation and control.

Course Study Materials

Module 1: Introduction

  • 1.1 Introduction to VLSI Design

  • 1.2 Combinational Circuit Design

  • 1.3 Programmable Logic Devices

  • 1.4 Programmable Array Logic

  • 1.5 Review of Flip-Flops

  • 1.6 Sequential Circuits and Sequential Circuits Design

  • 1.7 NMOS and PMOS Transistors

  • 1.8 Scaling principles & fundamental limits

  • 1.9 Propagation delays

  • Introduction - Assessment

    10 Questions

Module 2: Combinational Logic Circuits

  • 2.1 Simulation of Combinational Circuits and Sequenti

  • 2.2 Modelsim Simulation Tool

  • 2.3 Examples of Combinational Logic Design

  • 2.4 Pass transistor Logic

  • 2.5 Power dissipation

  • Combinational Logic Circuits - Assessment

    10 Questions

Module 3: Sequential Logic Circuits

  • 3.1 Static and Dynamic Latches and Registers

  • 3.2 Timing issues

  • 3.3 Pipelines

  • 3.4 Clock strategies

  • 3.5 Memory architecture and memory control circuits

  • 3.6 Synchronous and Asynchronous design

  • Sequential Logic Circuits - Assessment

    10 Questions

Module 4: Designing Arithmetic Building Blocks

  • 4.1 Data path circuits

  • 4.2 Architectures for ripple carry adders

  • 4.3 Accumulators

  • 4.4 Barrel shifters

  • 4.5 Automatic Test Pattern Generation

  • Designing Arithmetic Building Blocks - Assessment

    10 Questions

Module 5: Implementation Strategies

  • 5.1 Full custom and Semi custom design

  • 5.2 Standard cell design and cell libraries

  • 5.3 Algorithmic Level Techniques for Low Power Design

  • 5.4 Other Low Power Design Techniques

  • 5.5 FPGA building block architectures

  • 5.6 FPGA interconnect routing procedures

  • Implementation Strategies - Assessment

    10 Questions

Final Assessment

  • Final Assessment

    20 Questions

Certificate

The certificate issued for the Course will have the student's Name, Photograph, Course Title, Certificate number, Date of course completion and the name(s) and logo(s) of the Certifying Bodies. Only the e-certificate will be made available. No Hard copies. The certificates can be e-verifiable at www.ulektz.com/skills.

  • Students are required to take online assessments with eProctoring.
  • Students will be assessed both at the end of each module and at the end of the Course.
  • Students scoring a minimum of 50% in the assessments are considered for Certifications
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Course

Registration opens on 04-02-2019

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Course

Course starts on 23-01-2020

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You have completed 6 hours of learning for 12-07-2020. You can continue learning starting 13-07-2020.

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This course can only be taken in sequential order.

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Result Summary